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LF-Building-a-RISC-V-CPU-Core
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Merge branch 'stevehoover:main' into main

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Victor Timofei 2022-01-10 22:07:31 +02:00 committed by GitHub
parent 77577c5d03 977e7124bb
commit 959a2f5eec
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GPG Key ID: 4AEE18F83AFDEB23
3 changed files with 15 additions and 14 deletions
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1
.gitignore vendored Normal file
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@ -0,0 +1 @@
*.bak

20
lib/calc_viz.tlv
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@ -208,18 +208,18 @@
result[sig_name] = getSig(sig_name)
return result
}, {})
this.getInitObject("val1num").setText(sigs.val1.asInt(NaN).toString(16).padStart(8, " "))
this.getInitObject("val2num").setText(sigs.val2.asInt(NaN).toString(16).padStart(8, " "))
this.getInitObject("outnum").setText(sigs.out.asInt(NaN).toString(16).padStart(8, " "))
this.getInitObject("val1num").set({text: sigs.val1.asInt(NaN).toString(16).padStart(8, " ")})
this.getInitObject("val2num").set({text: sigs.val2.asInt(NaN).toString(16).padStart(8, " ")})
this.getInitObject("outnum").set({text: sigs.out.asInt(NaN).toString(16).padStart(8, " ")})
let op = sigs.op.asInt(NaN)
this.getInitObject("sumbox").setFill(op == 0 ? "#c0d0e0" : "#a0a0a0")
this.getInitObject("minbox").setFill(op == 1 ? "#c0d0e0" : "#a0a0a0")
this.getInitObject("prodbox").setFill(op == 2 ? "#c0d0e0" : "#a0a0a0")
this.getInitObject("quotbox").setFill(op == 3 ? "#c0d0e0" : "#a0a0a0")
this.getInitObject("sumbox").set({fill: op == 0 ? "#c0d0e0" : "#a0a0a0"})
this.getInitObject("minbox").set({fill: op == 1 ? "#c0d0e0" : "#a0a0a0"})
this.getInitObject("prodbox").set({fill: op == 2 ? "#c0d0e0" : "#a0a0a0"})
this.getInitObject("quotbox").set({fill: op == 3 ? "#c0d0e0" : "#a0a0a0"})
if (missing_list) {
this.getInitObject("calbox").setFill("red")
this.getInitObject("missing_sigs").setVisible(true)
this.fromInit().missing.setText(missing_list)
this.getInitObject("calbox").set({fill: "red"})
this.getInitObject("missing_sigs").set({visible:true})
this.fromInit().missing.set({text: missing_list})
}
}
\TLV

8
lib/risc-v_shell_lib.tlv
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@ -672,8 +672,8 @@ m4+definitions(['
// Missing signals
if (missing_list[0]) {
this.getInitObject("missing_sigs").setVisible(true)
this.fromInit().missing_col1.setText(missing_list[0])
this.fromInit().missing_col2.setText(missing_list[1])
this.fromInit().missing_col1.set({text: missing_list[0]})
this.fromInit().missing_col2.set({text: missing_list[1]})
}
return {objects: [pcPointer, pc_arrow, ...type_texts, rs1_arrow, rs2_arrow, rd_arrow, instrWithValues, fetch_instr_viz, src1_value_viz, src2_value_viz, result_shadow, result_viz, ld_arrow, st_arrow, load_viz, store_viz]};
}
@ -710,13 +710,13 @@ m4+definitions(['
let instr = this.svSigRef(`instrs(${this.getIndex()})`)
if (instr) {
let binary_str = instr.goToSimStart().asBinaryStr("")
this.getInitObject("binary").setText(binary_str)
this.getInitObject("binary").set({text: binary_str})
}
let disassembled = this.svSigRef(`instr_strs(${this.getIndex()})`)
if (disassembled) {
let disassembled_str = disassembled.goToSimStart().asString("")
disassembled_str = disassembled_str.slice(0, -5)
this.getInitObject("disassembled").setText(disassembled_str)
this.getInitObject("disassembled").set({text: disassembled_str})
}
}
this.getInitObject("disassembled").set({textBackgroundColor: rd_viz ? "#b0ffff" : "white"})