Restored \TLV test_prog() for reference solutions.
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@ -114,7 +114,7 @@ m4+definitions(['
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\TLV test_prog()
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\TLV test_prog()
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m4_test_prog()
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m4_test_prog(['TLV'])
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// Register File
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// Register File
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\TLV rf(_entries, _width, $_reset, $_port1_en, $_port1_index, $_port1_data, $_port2_en, $_port2_index, $_port2_data, $_port3_en, $_port3_index, $_port3_data)
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\TLV rf(_entries, _width, $_reset, $_port1_en, $_port1_index, $_port1_data, $_port2_en, $_port2_index, $_port2_data, $_port3_en, $_port3_index, $_port3_data)
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@ -6,7 +6,7 @@
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m4_include_lib(['https://raw.githubusercontent.com/stevehoover/LF-Building-a-RISC-V-CPU-Core/main/lib/risc-v_shell_lib.tlv'])
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m4_include_lib(['https://raw.githubusercontent.com/stevehoover/LF-Building-a-RISC-V-CPU-Core/main/lib/risc-v_shell_lib.tlv'])
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//---------------------------------------------------------------------------------
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//---------------------------------------------------------------------------------
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// /====================\
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// /====================\
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// | Sum 1 to 9 Program |
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// | Sum 1 to 9 Program |
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@ -34,10 +34,11 @@
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m4_define(['M4_MAX_CYC'], 50)
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m4_define(['M4_MAX_CYC'], 50)
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//---------------------------------------------------------------------------------
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//---------------------------------------------------------------------------------
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\SV
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\SV
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m4_makerchip_module // (Expanded in Nav-TLV pane.)
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m4_makerchip_module // (Expanded in Nav-TLV pane.)
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\TLV
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\TLV
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$reset = *reset;
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$reset = *reset;
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@ -18,7 +18,7 @@
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// ----------------------------------
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// ----------------------------------
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// Include solutions.
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// Include solutions.
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m4_include_makerchip_hidden(['LF_workshop_solutions.private.tlv'])
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m4_include_makerchip_hidden(['LF_workshop_solutions.private.tlv'])
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\SV
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\SV
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// Macro providing required top-level module definition, random
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// Macro providing required top-level module definition, random
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