Go to file
Steve Hoover 876efb8faa Updated regs to x vs r. 2021-02-17 19:57:32 -05:00
lib Updated regs to x vs r. 2021-02-17 19:57:32 -05:00
README.md Update README.md 2021-02-17 17:40:39 -05:00
full_riscv.tlv Misc updates. 2021-02-15 21:49:35 -05:00
risc-v_shell.tlv Quick fixes. 2021-02-15 21:55:36 -05:00
risc-v_solutions.tlv Prepping shell and reference solutions. 2021-02-17 17:33:13 -05:00

README.md

Building a RISC-V CPU Core

Accompanying resources for the Building a RISC-V CPU Core EdX course by Steve Hoover of Redwood EDA, Linux Foundation, and RISC-V International.

RISC-V Starting-Point Code

To begin the first RISC-V lab, Ctrl-click this link to open starting-point code in makerchip.

RISC-V Reference Solution

In case you get stuck, we've got your back! These reference solutions (Ctrl-click) will help with syntax, etc. without handing your the answers.

Final Result

Final Core