From d5bb6da13c462815675757d78eab7159b6af7dba Mon Sep 17 00:00:00 2001
From: Victor Timofei <victor@vtimothy.com>
Date: Mon, 10 Jan 2022 21:19:32 +0200
Subject: [PATCH] Add instruction memory

---
 risc-v_shell.tlv | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/risc-v_shell.tlv b/risc-v_shell.tlv
index 4d63404..f037618 100644
--- a/risc-v_shell.tlv
+++ b/risc-v_shell.tlv
@@ -49,6 +49,8 @@
    $next_pc[31:0] = $reset ? 0 : ($pc + 4);
 
    $pc[31:0] = >>1$next_pc;
+
+   `READONLY_MEM($pc, $$instr[31:0]);
    
    
    // Assert these to end simulation (before Makerchip cycle limit).