minor.
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@ -54,7 +54,6 @@
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//m4+rf(32, 32, $reset, $wr_en, $wr_index, $wr_data, $rd1_en, $rd1_index, $rd1_data, $rd2_en, $rd2_index, $rd2_data)
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//m4+dmem(32, 32, $reset, $wr_en, $wr_addr, $wr_data, $rd_en, $rd_addr, $wr_data)
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//m4+test_prog()
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m4+cpu_viz()
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\SV
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endmodule
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