From a7d3c26f76038ebdebdd814475ebd88707a8dd8b Mon Sep 17 00:00:00 2001 From: Victor Timofei Date: Tue, 11 Jan 2022 21:20:03 +0200 Subject: [PATCH] Disable writing to register 0 --- risc-v_shell.tlv | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/risc-v_shell.tlv b/risc-v_shell.tlv index 75f5558..4580637 100644 --- a/risc-v_shell.tlv +++ b/risc-v_shell.tlv @@ -73,7 +73,8 @@ $func3_valid = $is_r_instr || $is_i_instr || $is_s_instr || $is_b_instr; $rs2_valid = $is_r_instr || $is_s_instr || $is_b_instr; $rs1_valid = $is_r_instr || $is_i_instr || $is_s_instr || $is_b_instr; - $rd_valid = $is_r_instr || $is_i_instr || $is_u_instr || $is_j_instr; + $rd_valid = $rd == 0 ? 0 : + $is_r_instr || $is_i_instr || $is_u_instr || $is_j_instr; $imm_valid = $is_i_instr || $is_s_instr || $is_b_instr || $is_u_instr || $is_j_instr; `BOGUS_USE($rd $rd_valid $rs1 $rs1_valid $rs2 $rs2_valid $func3 $func3_valid $imm_valid $opcode)