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LF-Building-a-RISC-V-CPU-Core
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Connect result to write data

This commit is contained in:
Victor Timofei 2022-01-11 21:18:10 +02:00
parent 85eebd8a1b
commit 92c9d9c91e
Signed by: vtimofei
GPG Key ID: B790DCEBE281403A
1 changed files with 1 additions and 3 deletions
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4
risc-v_shell.tlv
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@ -110,9 +110,7 @@
32'b0; 32'b0;
// Register file // Register file
// TODO: this is for debugging only, REMOVE ME m4+rf(32, 32, $reset, $rd_valid, $rd[4:0], $result, $rs1_valid, $rs1[4:0], $src1_value, $rs2_valid, $rs2[4:0], $src2_value)
$rd_valid = 1'b0;
m4+rf(32, 32, $reset, $rd_valid, $rd[4:0], $wr_data[31:0], $rs1_valid, $rs1[4:0], $src1_value, $rs2_valid, $rs2[4:0], $src2_value)
//m4+dmem(32, 32, $reset, $addr[4:0], $wr_en, $wr_data[31:0], $rd_en, $rd_data) //m4+dmem(32, 32, $reset, $addr[4:0], $wr_en, $wr_data[31:0], $rd_en, $rd_data)
m4+cpu_viz() m4+cpu_viz()
\SV \SV