diff --git a/risc-v_shell.tlv b/risc-v_shell.tlv
index 691a055..fc70c5d 100644
--- a/risc-v_shell.tlv
+++ b/risc-v_shell.tlv
@@ -100,10 +100,6 @@
    $is_addi = $dec_bits ==? 11'bx_000_001_0011;
    $is_add = $dec_bits == 11'b0_000_011_0011;
 
-   // Assert these to end simulation (before Makerchip cycle limit).
-   *passed = 1'b0;
-   *failed = *cyc_cnt > M4_MAX_CYC;
-
    // Compute whether to branch
    $taken_br = $is_beq ? $src1_value == $src2_value :
       $is_bne ? $src1_value != $src2_value :
@@ -122,6 +118,10 @@
       $is_add ? $src1_value + $src2_value :
       32'b0;
 
+   // Assert these to end simulation (before Makerchip cycle limit).
+   m4+tb()
+   *failed = *cyc_cnt > M4_MAX_CYC;
+
    // Register file
    m4+rf(32, 32, $reset, $rd_valid, $rd[4:0], $result, $rs1_valid, $rs1[4:0], $src1_value, $rs2_valid, $rs2[4:0], $src2_value)
    //m4+dmem(32, 32, $reset, $addr[4:0], $wr_en, $wr_data[31:0], $rd_en, $rd_data)