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LF-Building-a-RISC-V-CPU-Core
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Update risc-v_solutions.tlv 

Applied a workaround to breaking changes in M4 processing affecting hiding mechanism. These changes are to be reverted once the issue is properly fixed.
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Steve Hoover 2021-03-28 19:59:52 -04:00 committed by GitHub
parent 378872dede
commit 0dae4321ff
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1 changed files with 4 additions and 2 deletions
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risc-v_solutions.tlv
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@ -18,6 +18,7 @@
// ----------------------------------
// Include solutions.
m4_define(['M4_FMT_NO_SOURCE'], 1)
m4_include_makerchip_hidden(['LF_workshop_solutions.private.tlv'])
\SV
@ -25,7 +26,8 @@
// stimulus support, and Verilator config.
m4_makerchip_module // (Expanded in Nav-TLV pane.)
\TLV
\source ./LFworkshopsolutions.private.tlv 7
\end_source
//=================\
// Choose Your Lab |
@ -42,4 +44,4 @@
\SV
endmodule
endmodule